ARCHITECTURE PROPOSAL · WORKING DRAFT

Permanent Machine Architecture

A stable whole-computer ISA for software that can remain portable, predictable and executable across generations of hardware.

CPUMEMORYGRAPHICSSTORAGENETWORKAUDIOI/OACCELERATORS
Core promise. Once a PMA architecture version is ratified, a conforming future machine must continue to execute its binaries with the same architectural semantics. Hardware may change radically; the computer seen by software does not.
PMA v0.1 · Exploratory draft · 28 August 2026
THE PITCH

Specify the computer, not just the CPU.

Modern systems preserve a CPU instruction set while leaving the rest of the machine — graphics, storage, audio, networking, peripherals, boot and accelerators — behind unstable interfaces. PMA extends the idea of an ISA outward until software sees a complete, durable computer.

The problem

A stable CPU is not a stable computer

An x86 or RISC-V binary may survive the processor generation and still depend on a disappearing OS version, GPU stack, driver model, firmware interface or device implementation.

The contract

A permanent whole-machine target

Software targets a named PMA profile containing CPU, memory, timers, device discovery and standardized machine devices. Old profiles remain implementable forever.

The implementation

Move compatibility below software

New silicon may translate old PMA operations internally, just as modern CPUs translate long-lived instruction sets into radically different micro-operations.

The payoff

Binary portability becomes normal

An application may run above an OS or directly on the machine. In either case the preserved artifact can be the actual executable environment, not merely source code that must be ported again.

The interface is permanent. The implementation is disposable.

This draft is intended to be small enough to implement, critique and replace.

CONTENTS

Seven ideas, in order.

The full normative spec — every device, table and draft rule — lives in the PDF, not on this page.

THE PROBLEM

Today, compatibility stops too early.

A program rarely targets a computer. It targets a transient combination of CPU ISA, operating system ABI, graphics API, driver stack, firmware behavior, device protocols and vendor tooling.

Typical platform stack
Application binary
OS + frameworks
Drivers + vendor runtimes
Specific hardware interfaces
PMA stack
Application or OS image
PMA profile
Any conforming implementation

The goal is not fewer transistors. It is fewer moving contracts above the transistors.

1

Porting cost

The same functionality is repeatedly re-expressed for new platform APIs and device stacks.

2

Lost predictability

High-performance and real-time software depends on layers it does not control.

3

Lost software history

Old source may survive while the exact executable environment becomes difficult or impossible to reproduce.

PMA treats the machine interface itself as a long-lived public artifact.

THE ARCHITECTURE

One machine, two equally valid software models.

General purpose

OS-hosted

Applications
Operating system
PMA machine profile
Hardware

The OS owns protection, processes, filesystems, networking policy and resource sharing. An old OS image can itself be the preserved binary environment.

Direct metal

Sovereign image

Application + runtime
PMA machine profile
Hardware

A game, instrument, control system or high-assurance appliance can own the machine directly and bundle only the functionality it needs.

Draft PMA-Computer-0 profile

CPU
RISC-V profile
Graphics / compute
display baseline + PMA-G
Tensor / NPU
future PMA-T
↓  ↓  ↓
Unified memory fabric
coherent RAM · IOMMU · DMA · stable physical device model
Audio
Input
Storage
Network
Peripheral I/O

Profiles are the unit of portability: software may assume every mandatory feature of the profile exists.

PROOF OF SUBSTANCE

A universal device contract.

The device model is the heart of PMA. Every device — storage, network, audio, graphics, tensor, peripheral I/O — is a simple asynchronous machine: shared-memory command queues, completion queues, memory-mapped control blocks and interrupts.

Software
writes descriptors, rings doorbell
Submission / completion queue
packed descriptors in RAM
Device
DMA / execute, signals completion

One transport shape, different payloads.

Common device header

PMA_DeviceHeader
  magic              u32
  class_id           u32
  interface_version  u32
  feature_bits       u64
  queue_count        u16
  event_count        u16
  queue_table_ptr    u64
  class_mmio_ptr     u64

Intentionally similar in spirit to proven interfaces such as VirtIO — PMA applies the same shape to the physical machine, not just virtual hardware.

THE ROADMAP

Build one small program that proves the machine exists.

The first public artifact is a single PMA boot image that exercises the complete minimal computer — no Linux, no Windows, no vendor driver.

BOOTDRAWREAD INPUTPLAY AUDIOREAD/WRITE STORAGESEND PACKETSCOMPUTE

Success criterion

The exact same boot image runs unchanged in:

Reference emulator
Fast emulator
FPGA prototype
First silicon

No source rebuild is required to move between implementations of the same profile.

Do not begin with a high-end SoC. Begin by making the architecture undeniable.

OPEN QUESTIONS

Questions that should remain uncomfortable.

PMA is deliberately incomplete. These are the places where confidence would be premature.

CPU baseline

Exactly which RISC-V profile and vector features become permanent in PMA-Computer-1? How should future CPU profiles coexist without fragmenting the software base?

Graphics boundary

What is the lowest stable abstraction that can be implemented efficiently by future GPUs without exposing ephemeral wave, tile or cache details?

Unified memory

Which coherence guarantees are mandatory between CPU, GPU, NPU and DMA devices? Where are explicit flush/invalidate operations required?

Numerical determinism

Which floating-point and transcendental behaviors are bit-exact, and which are bounded but implementation-dependent?

GPU/NPU evolution

Should older accelerator ISAs be supported by hardware translation, firmware translation, or a protected compatibility engine?

Governance

Who is allowed to ratify a permanent feature? What proof — emulator, formal model, FPGA, independent implementation — is required before a 1.0 promise is made?

The architecture should be easy to extend and deliberately hard to ratify.

THE THESIS

Built on proven ideas.

RISC-V's RVA23 profiles solve the CPU. RISC-V IOMMU solves device isolation. OASIS VirtIO proved the device-queue shape works. Arm SystemReady proved there's real demand for standardizing more than the instruction set. PMA takes that same instinct further, and makes it permanent.

RISC-V can provide the permanent CPU. PMA's job is to make the rest of the computer equally boring.

This is v0.1 — an exploratory proposal, concrete enough to implement, benchmark, criticize and replace before any permanence promise is made.